Канал: Mellow outlook

Left Inverse and Right Inverse of a Matrix

Left Inverse and Right Inverse of a Matrix

Inverse of a Matrix

Inverse of a Matrix

Basics of Linear Algebra

Basics of Linear Algebra

Numericals on Step Response of RC circuit- Part 1

Numericals on Step Response of RC circuit- Part 1

Step Response of RC Circuit

Step Response of RC Circuit

Transients- RC

Transients- RC

Mind Mapping of LINEAR ALGEBRA Concepts

Mind Mapping of LINEAR ALGEBRA Concepts

MATRIX FACTORIZATION IN ELECTICAL CIRCUITS- PART 1

MATRIX FACTORIZATION IN ELECTICAL CIRCUITS- PART 1

Thevenin's theorem

Thevenin's theorem

Superposition theorem

Superposition theorem

Reciprocity theorem

Reciprocity theorem

Nodal analysis

Nodal analysis

Mesh analysis

Mesh analysis

Wye -delta transformation -Solved Numericals

Wye -delta transformation -Solved Numericals

Wye -Delta Transformation Explained

Wye -Delta Transformation Explained

Current Division

Current Division

Essentials to solve numerical of waveform synthesis using Laplace transform

Essentials to solve numerical of waveform synthesis using Laplace transform

Laplace Transforms: An introduction

Laplace Transforms: An introduction

Practical Resonance circuits- Part 2

Practical Resonance circuits- Part 2

Practical Resonance Circuits- Part 1

Practical Resonance Circuits- Part 1

Resonance in two branch parallel circuit

Resonance in two branch parallel circuit

Series resonance for ac circuits- Part 2

Series resonance for ac circuits- Part 2

Series resonance for ac circuits- Part 1

Series resonance for ac circuits- Part 1

Resonance for AC circuits_ An Introduction

Resonance for AC circuits_ An Introduction

Two port network relationships

Two port network relationships

Transmission parameters of 2 port network_Part 2

Transmission parameters of 2 port network_Part 2

Numerical on hybrid parameter of two port network

Numerical on hybrid parameter of two port network

Transmission Parameters of two port network

Transmission Parameters of two port network

8051 program to multiply two 8-bit numbers or find the square of a 8-bit number.

8051 program to multiply two 8-bit numbers or find the square of a 8-bit number.

8051 program to multiply two 16-bit numbers

8051 program to multiply two 16-bit numbers

8051 program to divide two 8-bit numbers

8051 program to divide two 8-bit numbers

8051 program to convert a Decimal number into its hexadecimal equivalent.

8051 program to convert a Decimal number into its hexadecimal equivalent.

8051 program to convert a Hexadecimal number into its decimal equivalent.

8051 program to convert a Hexadecimal number into its decimal equivalent.

8051 program to convert 2 digit packed BCD to ASCII

8051 program to convert 2 digit packed BCD to ASCII

8051 program to convert ASCII to a decimal number

8051 program to convert ASCII to a decimal number

8051 program to convert decimal number to ASCII

8051 program to convert decimal number to ASCII

8051 program to arrange an array in ascending/ descending order

8051 program to arrange an array in ascending/ descending order

8051 program to find the largest or smallest number in an array

8051 program to find the largest or smallest number in an array

Cyber network security Hands-on 2

Cyber network security Hands-on 2

Enterprise Security Using Zachman Framework

Enterprise Security Using Zachman Framework

Cyber network security Hands-on 1

Cyber network security Hands-on 1

Prevalent Antipatterns- Hard On The Outside, Webify everything and No time for security

Prevalent Antipatterns- Hard On The Outside, Webify everything and No time for security

Prevalent antipatterns- Never Read the Logs and Networks always Play by the Rules.

Prevalent antipatterns- Never Read the Logs and Networks always Play by the Rules.

Prevalent antipatterns- Can't Patch Dumb and Unpatched Applications

Prevalent antipatterns- Can't Patch Dumb and Unpatched Applications

Cyber antipatterns

Cyber antipatterns

Cyber Network Security Concepts : Antipattern

Cyber Network Security Concepts : Antipattern

8051 program to check whether the number is even or odd.

8051 program to check whether the number is even or odd.

8051 Program to check whether a given number is positive or negative.

8051 Program to check whether a given number is positive or negative.

8051 Assembly language program to perform boolean operations: AND, NAND, OR, NOR, XOR, and XNOR

8051 Assembly language program to perform boolean operations: AND, NAND, OR, NOR, XOR, and XNOR

IKEv2

IKEv2

Internet key Exchange (IKE)

Internet key Exchange (IKE)

Transport mode and Tunnel Mode ESP

Transport mode and Tunnel Mode ESP

Anti-replay Service

Anti-replay Service

IP SECURITY POLICY

IP SECURITY POLICY

IPsec- Introduction

IPsec- Introduction

Domain Keys Identified Mail (DKIM)

Domain Keys Identified Mail (DKIM)

S/MIME -Part 2

S/MIME -Part 2

8051 program to exchange a block of data between internal data memory

8051 program to exchange a block of data between internal data memory

S/MIME- Introduction

S/MIME- Introduction

Pretty Good Privacy (PGP)

Pretty Good Privacy (PGP)

SSH Protocol-User Authentication Protocol and Connection Protocol

SSH Protocol-User Authentication Protocol and Connection Protocol

HTTPS and SSH (Secure Shell)

HTTPS and SSH (Secure Shell)

Transport Layer Security and Difference between TLS and SSL

Transport Layer Security and Difference between TLS and SSL

Cryptographic computations in SSL

Cryptographic computations in SSL

Handshake Protocol of SSL

Handshake Protocol of SSL

SSL/TLS Protocols

SSL/TLS Protocols

Transport level security

Transport level security

Introduction to web security

Introduction to web security

Sequential circuit design using FPGA

Sequential circuit design using FPGA

Sequential circuit design using CPLD

Sequential circuit design using CPLD

Parallel Adder with accumulator

Parallel Adder with accumulator

Design of Sequence Detector

Design of Sequence Detector

Parallel In Parallel Out Shift Register

Parallel In Parallel Out Shift Register

Design Of Binary Multiplier

Design Of Binary Multiplier

Serial Adder With Accumulator

Serial Adder With Accumulator

Construction of State Diagrams

Construction of State Diagrams

Numerical on Analysis of Sequential Circuit

Numerical on Analysis of Sequential Circuit

Flip Flop conversions

Flip Flop conversions

Numerical on State Machine Notations

Numerical on State Machine Notations

Excitation table and Equations

Excitation table and Equations

Mealy and Moore Model

Mealy and Moore Model

State Machine Notations

State Machine Notations

Design of Synchronous Counters for Random Sequence

Design of Synchronous Counters for Random Sequence

Counters_Part1

Counters_Part1

Counters _Part 2

Counters _Part 2

Registers

Registers

Implementation of Asynchronous Counter Using Digital Trainer Kit

Implementation of Asynchronous Counter Using Digital Trainer Kit

Realization of 3 bit synchronous counter Using IC 7476 on the IC Trainer Kit

Realization of 3 bit synchronous counter Using IC 7476 on the IC Trainer Kit

Realization of Mod 'n' Synchronous Counter using IC74192

Realization of Mod 'n' Synchronous Counter using IC74192

0's and 1's Catching Problem

0's and 1's Catching Problem

Realization of Mod 'n' Asynchronous counter using IC7490 in Digital IC Trainer Kit

Realization of Mod 'n' Asynchronous counter using IC7490 in Digital IC Trainer Kit

Characteristic Equations of Flip Flop

Characteristic Equations of Flip Flop

Edge Triggered Flip Flops

Edge Triggered Flip Flops

Flip Flops and Types of Triggering

Flip Flops and Types of Triggering

Master Slave J K Flip Flop

Master Slave J K Flip Flop

Master S R Flip Flop

Master S R Flip Flop

Simulation of Binary Multiplier Using Multisim

Simulation of Binary Multiplier Using Multisim

Timing Consideration in Latches

Timing Consideration in Latches

Latches

Latches

Introduction to Sequential Network

Introduction to Sequential Network

Programmable Array Logic (PAL) and Complex Programmable Logic Device(CPLD)

Programmable Array Logic (PAL) and Complex Programmable Logic Device(CPLD)

Field Programmable Gate Array (FPGA)

Field Programmable Gate Array (FPGA)

Programmable Logic Array (PLA)

Programmable Logic Array (PLA)

Binary Comparators

Binary Comparators

Iterative Magnitude Comparator

Iterative Magnitude Comparator

Parallel Adder/Subtractor and Look Ahead Carry Adder

Parallel Adder/Subtractor and Look Ahead Carry Adder

Using Multiplexers as Boolean Function Generators.

Using Multiplexers as Boolean Function Generators.

Binary Adders and Subtractors

Binary Adders and Subtractors

Multiplexers -Part 2

Multiplexers -Part 2

Multiplexers- Part 1

Multiplexers- Part 1

Encoders- Part 3

Encoders- Part 3

Encoder- Part 2

Encoder- Part 2

Encoder- Part 1

Encoder- Part 1

Realization of Adder and Subtractor Using IC 74139

Realization of Adder and Subtractor Using IC 74139

3:8 Decoder using IC 74138 and BCD decoder using IC 74LS42

3:8 Decoder using IC 74138 and BCD decoder using IC 74LS42

Decoders with Enable Input

Decoders with Enable Input

Logic Design using Decoders

Logic Design using Decoders

Decoders

Decoders

General Approach to combinational Logic Design

General Approach to combinational Logic Design

Quine McClusky Minimization Technique - Part 3

Quine McClusky Minimization Technique - Part 3

Quine McClusky Minimization Technique - Part 1

Quine McClusky Minimization Technique - Part 1

Quine McClusky Minimization Technique - Part 2

Quine McClusky Minimization Technique - Part 2

Incompletely specified Functions (Dont Care Terms)

Incompletely specified Functions (Dont Care Terms)

Simplifying Maxterm Equations

Simplifying Maxterm Equations

Five Variable K-Map

Five Variable K-Map

Hardware Implementation of Half Subtractor and Full Subtractor Using IC Trainer Kit

Hardware Implementation of Half Subtractor and Full Subtractor Using IC Trainer Kit

Solved Numerical on Four Variable Karnaugh Map

Solved Numerical on Four Variable Karnaugh Map

Hardware Implementation of Half Adder and Full Adder Using IC Trainer Kit

Hardware Implementation of Half Adder and Full Adder Using IC Trainer Kit

Three Variable K-Map

Three Variable K-Map

Prime implicants and Essential Prime Implicants in K-Map

Prime implicants and Essential Prime Implicants in K-Map

Mapping of deciminal notations onto karnaugh map

Mapping of deciminal notations onto karnaugh map

Two Variable karnaugh Map

Two Variable karnaugh Map

Combinational Logic Concepts -simplified

Combinational Logic Concepts -simplified

Implementation of boolean equations

Implementation of boolean equations

Converting SOP expression to canonical form and representing in shorthand decimal notation

Converting SOP expression to canonical form and representing in shorthand decimal notation

Converting POS expression to canonical form and representing in shorthand decimal notation

Converting POS expression to canonical form and representing in shorthand decimal notation

Numerical on constructing truth tables from verbal statements

Numerical on constructing truth tables from verbal statements

Minterms, Maxterms and Shorthand Decimal Notations

Minterms, Maxterms and Shorthand Decimal Notations

Hardware implementation of NAND, NOR, XOR using IC trainer Kit

Hardware implementation of NAND, NOR, XOR using IC trainer Kit

Principles of Combinational logic

Principles of Combinational logic

Hardware Implementation of NOT Gate using IC Trainer Kit

Hardware Implementation of NOT Gate using IC Trainer Kit

Hardware Implementation of OR Gate using IC Trainer Kit

Hardware Implementation of OR Gate using IC Trainer Kit

Hardware Implementation of AND gate using IC trainer Kit

Hardware Implementation of AND gate using IC trainer Kit

Digital IC Trainer Kit - Explained

Digital IC Trainer Kit - Explained

Boolean Algebra

Boolean Algebra

Polarity marking and Pin numbering in IC

Polarity marking and Pin numbering in IC

Applications of Binary Numbers, Boolean Logic and Gates

Applications of Binary Numbers, Boolean Logic and Gates

Solved Numerical on Miscallaneous Bias Configurations (Part 2)

Solved Numerical on Miscallaneous Bias Configurations (Part 2)

Simulation Analysis of Inverting Summing Amplifier for ac inputs.

Simulation Analysis of Inverting Summing Amplifier for ac inputs.

Solved Numerical on Miscellaneous Bias Configurations.

Solved Numerical on Miscellaneous Bias Configurations.

Feedback Connection and its 3 networks.

Feedback Connection and its 3 networks.

Derivation of Closed loop voltage gain of Non inverting Amplifier Circuit

Derivation of Closed loop voltage gain of Non inverting Amplifier Circuit

Circuit Analysis of Instrumentation Amplifier Using Opamp

Circuit Analysis of Instrumentation Amplifier Using Opamp

Simulation of Series and Parallel Circuit

Simulation of Series and Parallel Circuit

Circuit Analysis of DAC

Circuit Analysis of DAC

Simulation of Inverting Amplifier

Simulation of Inverting Amplifier

Operation of FET based Phase shift oscillator

Operation of FET based Phase shift oscillator

Class C Output Stage

Class C Output Stage

Power Amplifiers and Output Stages

Power Amplifiers and Output Stages

Bypass Capacitor-Operation and Function

Bypass Capacitor-Operation and Function

Simulation Of Hartley Oscillator Using Multisim

Simulation Of Hartley Oscillator Using Multisim

Class AB Output Stage

Class AB Output Stage

Numericals on Class B output Stage

Numericals on Class B output Stage

Class B output stage

Class B output stage

Simulation Of Astable Multivibrator Using Multisim

Simulation Of Astable Multivibrator Using Multisim

Simulation Of Monostable Multivibrator Using Multisim

Simulation Of Monostable Multivibrator Using Multisim

Simulation Of Half wave Precision Rectifier Using Multisim

Simulation Of Half wave Precision Rectifier Using Multisim

Simulation Of Full wave Precision Rectifier Using Multisim

Simulation Of Full wave Precision Rectifier Using Multisim

Class A output Stage

Class A output Stage

Numericals on CLass A output Stage

Numericals on CLass A output Stage

Numerical on Properties of negative feedback

Numerical on Properties of negative feedback

Analysis of Feedback transresistnace amplifier/ Shunt-Shunt Topology

Analysis of Feedback transresistnace amplifier/ Shunt-Shunt Topology

Analysis of Feedback current amplifier/ Shunt-Series Topology

Analysis of Feedback current amplifier/ Shunt-Series Topology

Four Basic Feedback Topologies- Explaination

Four Basic Feedback Topologies- Explaination

Analysis of Feedback voltage amplifier/Series -Shunt Topology

Analysis of Feedback voltage amplifier/Series -Shunt Topology

Analysis of Feedback Transconductance amplifier/ Series-Series Topology

Analysis of Feedback Transconductance amplifier/ Series-Series Topology

what is a single pole amplifier

what is a single pole amplifier

Single time constant circuit

Single time constant circuit

Analysis of low frequency response of CS amplifier with Solved Numerical

Analysis of low frequency response of CS amplifier with Solved Numerical

Analysis of High Frequence response of CS Amplifier with Solved Numerical

Analysis of High Frequence response of CS Amplifier with Solved Numerical

Feedback Amplifiers-General Structure and Numerical

Feedback Amplifiers-General Structure and Numerical

Frequency response of CS Amplifier

Frequency response of CS Amplifier

Properties of Negative feedback with Derivation

Properties of Negative feedback with Derivation

Crytsal oscillator with Solved Numericals

Crytsal oscillator with Solved Numericals

LC oscillators

LC oscillators

MOSFET High Frequency Model

MOSFET High Frequency Model

Colpitts oscillator

Colpitts oscillator

MOSFET internal Capacitances

MOSFET internal Capacitances

Numericals on Common Drain Amplifier/ Source Follower

Numericals on Common Drain Amplifier/ Source Follower

Common Drain Amplifier/ Source Follower

Common Drain Amplifier/ Source Follower

Common Source Amplifier

Common Source Amplifier

Mosfet Amplifer configuration and characterization

Mosfet Amplifer configuration and characterization

MOSFET Small Signal Operation and Model

MOSFET Small Signal Operation and Model

Design and Numericals on Biasing using MOSFET

Design and Numericals on Biasing using MOSFET

Biasing using MOS amplifier circuits

Biasing using MOS amplifier circuits

Introduction to MOSFET

Introduction to MOSFET

BJT Small -Signal Operation and Model- Part-3

BJT Small -Signal Operation and Model- Part-3

BJT Small Signal Operation and Model- Part 2

BJT Small Signal Operation and Model- Part 2

BJT Small- Signal Operation and model- Part1-(basics)

BJT Small- Signal Operation and model- Part1-(basics)

Transistor Fundamentals

Transistor Fundamentals