In this video, first, we will demonstrate how to simulate and synthesize a circuit displaying prime numbers using a PIC MCU VHDL code.
In the end, we will download the circuit’s configuration file to the Terasic DE10-Lite FPGA board.
In our circuit, PIC16F84 Prime number generator Sim DE10 Lite.tsc, the PIC MCU model is written in VHDL.
The VHDL code is the functional model of a PIC16F84 8-bit microcontroller with initialized flash program memory.
First, we look at the VHDL code using TINA HDL Editor.
Next, we will check the program code written in C and converted to this VHDL code.
The project was created, and the program was developed with the free version of Microchip MPLAB IDE and their Microchip XC8 compiler.
After that, we return to TINA's Schematic Editor to test our circuit with digital circuit simulation.
Then, we'll open again the MPLAB editor to make the main difference in the C code for the synthesis, like the processor speed (50 MHz). This is the oscillator frequency of the Terasic DE10-Lite FPGA board.
Next, we compile the project and convert the result – the executable binary – into VHDL.
The code is placed in the flash ROM component of our VHDL PIC model.
Finally, we will test our circuit, " PIC16F84 Prime number generator DE10 Lite " in a real environment using the Terasic DE10-Lite FPGA board.
Next, we will export the VHDL to the Quartus Prime Lite software, compile it and load the resulting bitstream into the Terasic DE10-Lite FPGA development board.
As soon as we finish programming the hardware and we turn the Terasic DE10-Lite board on, we can see the prime numbers written on the display as expected.
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