A field-programmable gate array (FPGA) is an integrated circuit (IC) that lets you implement custom digital circuits. You can use an FPGA to create optimized digital logic for things like digital signal processing (DSP), machine learning, and cryptocurrency mining. Because of the FPGA’s flexibility, you can often implement entire processors using its digital logic. You can find FPGAs in consumer electronics, satellites, and in servers used to perform specialized calculations.
In this series, we will see how an FPGA works and demonstrate how to create custom digital logic using the Verilog hardware description language (HDL).
Previously, we demonstrated how to create a Verilog testbench and simulate a design using Icarus Verilog ([ Ссылка ]). In this episode, we look at using block RAM to store data.
The solution to the challenge at the end of the episode can be found here: [ Ссылка ]
All code examples and solutions for this series can be found here: [ Ссылка ]
Often you will need to store data in your digital design. This could be samples from a sensor, instructions for a CPU, or output from complex mathematical calculations. One obvious place to store data is in the D flip-flops in the logic cells. However, as each flip-flop can store only 1 bit, you would quickly waste most of your cells trying to store more than a few bytes.
One solution is to store data in the look-up tables (LUTs). This is known as “distributed RAM.” If you don’t need to store much data, your synthesis tool might allocate LUTs as distributed RAM. However, if you need to store more than a few bytes, you might be better off using block RAM.
A block RAM is a contiguous piece of memory that exists alongside the reprogrammable fabric. In most cases, block RAM is reconfigurable to a number of widths and depths. We can use system functions (denoted with a ‘$’) to allocate block RAM, but these commands are often unique to a particular synthesis tool.
Instead, we will write pure Verilog code that describes the behavior of the RAM. The synthesis tool will infer that we want to use block RAM and allocate it for us.
Additionally, we can write a text file with initial RAM values if we wish to have the synthesis tool load those values into RAM during the FPGA configuration process.
Your challenge is to create a simple 2-bit sequencer that records and plays up to 8 steps. You should use two buttons to enter a pattern and another button to record that pattern to memory. Meanwhile, the FPGA should be looping through the memory elements (e.g. 8 memory elements) and displaying the stored patterns on 2 of the LEDs.
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