Gone are the days where only basic voltage and timing measurements would suffice for validating a high-speed design.
Large-scale design integration with devices such as SoCs or FPGA require strict impedance control, tight timing references and a host of other complex parameters to manage.
How do you efficiently address signal integrity issues? Where do you start debugging?
In today’s R&S Thirty-Five webcast, you will learn about new tools that can help you be more efficient at debugging signal integrity issues.
