Bar-Ilan University 83-313: Digital Integrated Circuits
This is Lecture 9 of the Digital Integrated Circuits (VLSI) course at Bar-Ilan University. In this course, I cover VLSI circuit design, starting with the technology and through the design of complex digital circuits, such as multipliers and memory blocks.
Lecture 9 discusses the peripheral circuitry required to build and access a memory array. Section 9b dives down into the boolean structure of a row decoder and then presents the concepts and tradeoffs when designing a decoder.
Lecture slides can be found on the EnICS Labs web site at:
[ Ссылка ]
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Prof. Adam Teman
Emerging nanoscaled Integrated Circuits and Systems (EnICS) Labs
Faculty of Engineering, Bar-Ilan University
VLSI - Lecture 9b: Row Decoder Design
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Chip DesignBar-Ilan UniversityVLSI83313Adam TemanAdi TemanEnICS LabsSemiconductorsCircuit DesignHardware CourseElectrical EngineeringDigital Integrated CircuitsSRAMStatic Random Access MemoryMemoryembedded Memory6T6T SRAMbitcellperipheralsdecodermultiplexerXDecoderColumn MuxRow Decoderdynamicpseudo-NMOSsense amplifierprechargeaccess timedatasheettiming diagramssetupholdNANDNORlogical effortoptimizationnumber of stages