UTIA developed framework for automated implementation of short-latency
digital control and DSP algorithms for Xilinx
16nm Zynq Ultrascale+ devices.
Supported generation of (SG)DMA streaming HW data-movers for HW accelerators is based
on Xilinx SDSoC 2018.2 (C to HW) synthesis.
HW accelerator chain is represented by shared
library for the g++ compiler embedded on A53.
Supported A53 Debian OS is compatible with ArrowHead-Framework 4.1.3 C++ Producer and Consumer SW clients (technology from WP1).
This technology was used in the ball-tracking sensor developed by UTIA+AITIA+BMI in WP1.

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